|Innovations enabling semiconductor roadmap|
|刘致为 Chee Wee Liu|
|  Professor Chee Wee Liu received his M.S.(1987)/B.S.(1985) from National Taiwan University (NTU), and Ph.D (1994) from Princeton University. Currently, he is the distinguished/chair professor of Department of Electrical Engineering, NTU. He is the Associate Editor of IEEE Transactions on Nanotechnology (T-NANO), Editor of IEEE Transactions on Device and Materials Reliability (T-DMR), and an IEEE Fellow. His research includes SiGe/GeSn epi/photonics, stacked 3D transistors, thermal simulation, IGZO TFT, and solar cells.|
|  Scaling has been running out of steam starting at the 90 nm technology node. To break/tunnel the red brick wall down the road, the first mobility enhancement technology (strained Si) was adopted, and was followed by high K/metal gate, wet 193 litho, and FinFETs. Advanced nodes need more innovations such as EUV, GAA, stacked channels, monolithic 3D, and 3D TSV package.
The progress from 90nm will be presented in terms of technologies and physics behind. Strong theoretical study is necessary to interpret the experimental data makes the advanced node possible, while advanced technologies make it possible to probe the new scientific frontiers.